1. Field of the Invention
The present invention relates to a non-volatile memory.
2. Description of the Related Art
Semiconductor memory devices have become more popular for use in various electronic devices. For example, non-volatile semiconductor memory is used in cellular telephones, digital cameras, personal digital assistants, mobile computing devices, non-mobile computing devices and other devices. Electrical Erasable Programmable Read Only Memory (EEPROM) and flash memory are among the most popular non-volatile semiconductor memories.
Many types of EEPROM and flash memories utilize a floating gate that is positioned above and insulated from a channel region in a semiconductor substrate. The floating gate is positioned between source and drain regions. A control gate is provided over the floating gate. The control gate is insulated from the floating gate by a dielectric region. The threshold voltage of the transistor is controlled by the amount of charge that is retained on the floating gate. That is, the minimum amount of voltage that must be applied to the control gate before the transistor is turned on to permit conduction between its source and drain is controlled by the level of charge on the floating gate.
One example of a flash memory system uses the NAND structure, which includes arranging multiple transistors in series, between two select gates. The transistors in series and the select gates are referred to as a NAND string. Relevant examples of NAND type flash memories and their operation are provided in the following patent documents, all of which are incorporated herein by reference in their entirety: U.S. Pat. No. 5,570,315; U.S. Pat. No. 5,774,397; U.S. Pat. No. 6,046,935; U.S. Pat. No. 6,456,528; and U.S. Pat. Publication No. US2003/0002348. The discussion herein can also apply to other types of non-volatile storage in addition to NAND.
One proposal for a dielectric region between the control gate and the floating gate is to use silicon oxide SiO2 (hereinafter referred to as oxide). Another proposal is to use an oxide-nitride-oxide (“ONO”) configuration that includes an inner layer of silicon nitride SiN (hereinafter referred to as nitride) sandwiched between outer layers of oxide. ONO is an improvement over a simple oxide dielectric because the inner nitride layer can provide trap sites, which can be taken advantage of during early application of high voltage stresses by trapping electrons and, thereby, locally raising the band diagram. This trapping and local elevation of the band diagram results in a self healing effect that discourages further leakage (e.g., unwanted conduction) through the dielectric.
While ONO is an improvement over a simple oxide dielectric, there are some drawbacks. For example, during the creation of sidewalls for a transistor, an oxidation process can be used to grow an oxide sidewall. It has been observed that the corners of the floating gate, and the corners of the control gate can oxidize during the sidewall oxidation process and become silicon oxide. This is called the Bird's Beak Effect because the shape of the resultant oxide is in the shape of a bird's beak.
To avoid the above-described Bird's Beak Effect, outer nitride layers have been added to the ONO dielectric to create NONON (nitride-oxide-nitride-oxide-nitride) because nitride is a good barrier to diffusion and, therefore, prevents oxidation. While NONON does not suffer from the Bird's Beak effect, adding the outer nitride layers makes the dielectric thicker. A thicker dielectric can result in a larger memory cell, or an increased amount of floating gate to floating gate capacitance coupling causing capacitive or electric field interference effects. However, the trend is to reduce the size of the memory cell in order to increase density of memory cells so that memory systems can be made with greater amounts of storage relative to cost.